The chip is a 16-bit I/O expander. It provides remote GPIO expansion for most MCU families via the I2C or SMBus interface. The PJ59555 has two 8-bit Input Port register, Output Port register, Configuration register (setup as input or output), and Polarity Inversion register (active high or active low). After power on, the 16 I/O pins are configured as inputs with an internal weak pull up to VCC. However, the master can enable the I/O pins as either inputs or outputs individually by setup the configuration register bits. If no external signals are applied to the PJ59555 I/O pins, the voltage level is high due to the internal pull-up resistors. The data for each input or output is stored in the corresponding input or output port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. The master can reset the chip probably caused by timeout or other improper operation using the power-on reset feature, which resets all registers in their default state and initializes the I2C/SMBus state machine. The chip has outputs latch feature, which can protect the chip when driving LEDs directly with high-current capability. The PJ59555 open-drain interrupt output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. Available Package: TSSOP-24 package
metawells
