The PJ74LVC1G125 is a single bus buffer gate. The device is designed for 1.65 V to 5.5 V for VCC operation, it can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. The PJ74LVC1G125 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE(____)) input is high. The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range. The PJ74LVC1G125 is available in SOT23-5 and SC70-5 packages.
Product Description
Single Bus Buffer Gate With 3-State Output
In a SOT23-5 and SC70-5 Package
Product Features
Applications
Product Introduction
Product Specifications
Recommended Operating Conditions
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Key Electrical Characteristics
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